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| HN62W4416N Series 1048576-word x 16-bit/2097152-word x 8-bit CMOS Mask Programmable ROM ADE-203-468 (Z) Preliminary Rev. 0.0 Nov. 20, 1995 Description The HN62W4416N is a 16-Mbit CMOS mask-Programmable ROM organized either as 1048576 words by 16 bits or 2097152 words by 8 bits. Realizing low power consumption, this memory is allowed for battery operation. And a high speed access of 150 ns (max) is the most suitable to the system using a high speed micro-computer by 16 bits. Feature * Low voltage operation Mask ROM Single 3.3 V supply * High speed Normal access time: 150 ns (max) Page access time: 50 ns (max) * Low power Active: 252 mW (max) Standby: 108 W (max) * Byte-wide or word-wide data organization (Switched by BHE terminal) * 4 word page access on word-wide mode * 8 byte page access on byte-wide mode * Three-state data output for or-tying * Directly LVTTL compatible All inputs and outputs Ordering Information Type No. HN62W4416NP-15 HN62W4416NFB-15 HN62W4416NTT-15 Access time 150 ns 150 ns 150 ns Package 600 mil 42-pin plastic DIP (DP-42) 600 mil 44-pin plastic SOP (FP-44D) 400 mil 44-pin plastic TSOP II (TTP-44D) Preliminary: This document contains information on a product. Specifications and information contained herein are subject to change without notice. HN62W4416N Series Pin Arrangement HN62W4416NP Series HN62W4416NFB Series HN62W4416NTT Series A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BHE VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VDD NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE VSS OE D0 D8 D1 D9 D2 D10 D3 D11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 (Top View) 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BHE VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VDD A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE VSS OE D0 D8 D1 D9 D2 D10 D3 D11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 (Top View) 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 Pin Description Pin name A2 to A19 D0 to D15 BHE A-1, A0 , A1 BHE CE OE NC VDD VSS Function Address inputs Data outputs 8/16 bit (byte/word) mode switch Page address inputs 8/16 bit (byte/word) mode switch Chip enable Output enable No connection Power supply Ground 2 HN62W4416N Series Block Diagram A19 A8 X Decoder Memory Array A7 A2 Address Buffer Y Decoder Y Gates A1 Page Decoder A0 (A-1)*1 Hex/Byte BHE OE 3-state output buffer CE D0 BHE = VIH : 16-bit (D15 to D0) BHE = VIL : 8-bit (D7 to D0) Note : 1. A-1 is least significant address. When BHE is 'low', D14 to D8 goes the high impedance state, and D15 should be A-1. D15/(D7) Mode Selection Pin Data output Mode Standby Output disable Read (16-bit) Read (8-bit) Read (8-bit) CE H L L L L OE x *1 Address input D8-D15 LSB -- -- A0 A-1 A-1 MSB -- -- A19 A19 A19 BHE x x H L L D15/A-1 D0-D7 x x Dout L H High-Z High-Z D0 to D7 D0 to D7 D8 to D15 *2 High-Z High-Z D8 to D15 High-Z High-Z H L L L Notes: 1. x: Don't care. 2. High-Z: High impedance 3 HN62W4416N Series Absolute Maximum Ratings Parameter Supply voltage *1 *1 Symbol VDD Vin, Vout Topr Tstg Tbias Value -0.3 to +5.5 -0.3 to VDD + 0.3 0 to +70 -55 to +125 -20 to +85 Unit V V C C C All input and output voltage Operating temperature range Storage temperature range Temperature under bias Note: 1. With respect to V SS . Recommended DC Operating Conditions (Ta = 0 to + 70C) Parameter Supply voltage Symbol VDD VSS Input voltage VIH VIL Min 3.0 0 2.2 -0.3 Typ 3.3 0 -- -- Max 3.6 0 VDD + 0.3 0.8 Unit V V V V DC Characteristics (VDD = 3.3 V 0.3 V, V SS = 0 V, Ta = 0 to + 70C) Parameter Supply current Active Standby Standby Input leakage current Output leakage current Output voltage Symbol I DD I SB1 I SB2 |IIL| |IOL | VOH VOL Min -- -- -- -- -- 2.4 -- Max 70 30 3 10 10 -- 0.4 Unit mA A mA A A V V Test conditions VDD = 3.6 V, IDOUT = 0 mA, tRC = 150 ns VDD = 3.6 V, CE VDD - 0.2 V VDD = 3.6 V, CE 2.2 V Vin = 0 to VDD CE = 2.2 V, Vout = 0 to V DD I OH = -2.0 mA I OL = 2.0 mA Capacitance (VDD = 3.3 V 0.3 V, V SS = 0 V, Ta = 25C, Vin = 0 V, f = 1MHz) Parameter Input capacitance *1 *1 Symbol Cin Cout Min -- -- Max 10 15 Unit pF pF Output capacitance Note: 1. This parameter is sampled and not 100% tested. D15/A-1 pin is output. 4 HN62W4416N Series AC Characteristics (VDD = 3.3 V 0.3 V, V SS = 0 V, Ta = 0 to + 70C) * * * * Output load: 1TTL + CL = 100 pF (including jig) Input pulse level: 0.4 to 2.4 V Input and output timing reference level: 1.4 V Input rise and fall time: 5 ns HN62W4416N-15 Parameter Read cycle time Page read cycle time Address access time Page address access time CE access time OE access time BHE access time Output hold time from address change Output hold time from CE Output hold time from OE Output hold time from BHE CE to output in high-Z OE to output in high-Z BHE to output in high-Z CE to output in low-Z OE to output in low-Z BHE to output in low-Z Note: Symbol t RC t PC t AA t PA t ACE t OE t BHE t DHA t DHC t DHO t DHB t CHZ t OHZ t BHZ t CLZ t OLZ t BLZ Min 150 50 -- -- -- -- -- 5 0 0 0 -- -- -- 5 5 5 Max -- -- 150 50 150 50 150 -- -- -- -- 50 50 30 -- -- -- Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 1 1 1 Note 1. t CHZ, tOHZ and t BHZ are defined as the time at which the output achieves the open circuit conditions and are not referred to output voltage levels. 5 HN62W4416N Series Timing Waveforms Word Mode (BHE = `VIH') or Byte Mode (BHE = `VIL') tRC Address tAA tACE CE tCLZ tOE OE tOLZ High-Z tDHO tOHZ Valid data High-Z tDHC tCHZ tDHA Dout Notes : 1. tDHA, tDHC, tDHO : Determined by faster. 2. tAA, tACE, tOE : Determined by slower. 3. tCLZ, tOLZ : Determined by slower. Word Mode, Byte Mode Switch A-1 High-Z tAA tDHA High-Z BHE tBHZ D7 to D0 tDHB High-Z D15 to D8 Valid data tBLZ Valid data tBHE Valid data Notes : 1. CE and OE are enable, A19 to A0 are valid. 2. D15/A-1 pin is in the output state when BHE is high, CE and OE are enable. Therefore, the input signals of opposite phase to the output must not be applied to them. 6 HN62W4416N Series Page mode A2 to A19 tRC A0, A1, (A-1) tPA tAA tDHA tPA tDHA tPA tDHA tDHA tPC tPC tPC Dout Valid data Valid data Valid data Valid data Notes : 1. Page address is determined as below. Word mode (BHE = 'High') : A0, A1. Byte mode (BHE = 'Low') : A-1, A0, A1 2. CE and OE are eneble. Power Up Sequence VCC 3.0 V 0V tP > 0 s CE tACE Address tAA Dout Valid data Valid data Note : 1. This device is used ATD (Address Transition Detecter). Therefore, transfer either CE or address (A19 to A2) after power up to 3.0 V. 7 HN62W4416N Series Package Dimensions HN62W4416P Series (DP-42) Unit: mm 42 52.80 53.80 Max 22 15.0 Max 2.54 Min 5.06 Max 13.40 1 1.3 Max 1.20 21 15.24 0.51 Min 2.54 0.25 0.48 0.10 0.25 - 0.05 0 - 15 + 0.26 HN62W4416FB Series (FP-44D) Unit: mm 28.50 28.70 Max 44 23 12.60 3.00 Max 1 1.02 Max 22 0.17 0.05 16.04 0.30 1.72 0.40 0.10 1.27 0.10 0.12 M 0.19 0.10 0 - 10 0.80 0.20 8 HN62W4416N Series Package Dimensions (cont) HN62W4416TT Series (TTP-44D) 18.41 18.81 Max 44 23 Unit: mm 1 0.30 0.10 0.80 0.13 M 22 10.16 1.105 Max 1.20 Max 0.17 0.05 11.76 0.20 0 - 5 +0.03 -0.05 0.10 0.80 0.13 0.50 0.10 9 |
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